STUDENT GRADER Total Score I am submitting my own work, and I understand penalties will be assessed if I submit work for credit that is not my own. Print Name ID Number Sign Name Date # Points Score 1 4 2 8 3 6 4 12 5 4 6 10 7 8 8 6 9 6 Weeks late Adjusted Score Estimated Work Hours 1 2 3 4 5 6 7 8 9 10 1 2 3 4 5 6 7 8 9 10 Overall Weight Adjusted Score: Deduct 20% from score for each week late Problem 1. Sketch circuits for the following logic equations. Y <= (A and B and C) or not ((A and not B and C and not D) or not (B or D)); X <= (A xor (B and C) xor not D) or (not (B xor C) and not (C or D)) Problem 2. Sketch circuits and write VHDL assignment statements for the following equations. F = m(1, 2, 6) F = M(0, 7) Problem 3. Write logic assignment statements for the following circuit. Problem 4: Sketch circuits and write VHDL assignment statements for the truth tables below. Problem 5: Sketch POS circuits for the 2XOR and 2XNOR functions. Problem 6: Sketch the circuit described by the netlist shown, and complete the timing diagram for the stimulus shown to document the circuit’s response to the example stimulus. Use a 100ns vertical grid in your timing diagram, and show all inputs and outputs. Problem 7: Create a truth table that corresponds to the simulation shown below. Show all input and output values in the truth table, and sketch a logic circuit that could have been used to create the waveform. Problem 8. The Seattle Mariners haven’t had a stolen base in 6 months, and the manager decided it was because the other teams were reading his signals to the base runners. He came up with a new set of signals (pulling on his EAR, lifting one LEG, patting the top of his HEAD, and BOWing) to indicate when runners should attempt to steal a base. A runner should STEAL a base if and only if the manager pulls his EAR and BOWs while patting his HEAD, or if he lifts his LEG and pats his HEAD without BOWing, or anytime he pulls his EAR without lifting his LEG. Sketch a minimal circuit that could be used to indicate when a runner should steal a base. Problem 9. A room has four doors and four light switches (one by each door). Sketch a circuit that allows the four switches to control the light – each switch should be able to turn the light on if it is currently off, and off if it is currently on. Note that it will not be possible to associate a given switch position with “light on” or “light off” – simply moving any switch should modify the light’s status.

## STUDENT GRADER Total Score I am submitting my own work, and I understand penalties will be assessed if I submit work for credit that is not my own. Print Name ID Number Sign Name Date # Points Score 1 4 2 8 3 6 4 12 5 4 6 10 7 8 8 6 9 6 Weeks late Adjusted Score Estimated Work Hours 1 2 3 4 5 6 7 8 9 10 1 2 3 4 5 6 7 8 9 10 Overall Weight Adjusted Score: Deduct 20% from score for each week late Problem 1. Sketch circuits for the following logic equations. Y <= (A and B and C) or not ((A and not B and C and not D) or not (B or D)); X <= (A xor (B and C) xor not D) or (not (B xor C) and not (C or D)) Problem 2. Sketch circuits and write VHDL assignment statements for the following equations. F = m(1, 2, 6) F = M(0, 7) Problem 3. Write logic assignment statements for the following circuit. Problem 4: Sketch circuits and write VHDL assignment statements for the truth tables below. Problem 5: Sketch POS circuits for the 2XOR and 2XNOR functions. Problem 6: Sketch the circuit described by the netlist shown, and complete the timing diagram for the stimulus shown to document the circuit’s response to the example stimulus. Use a 100ns vertical grid in your timing diagram, and show all inputs and outputs. Problem 7: Create a truth table that corresponds to the simulation shown below. Show all input and output values in the truth table, and sketch a logic circuit that could have been used to create the waveform. Problem 8. The Seattle Mariners haven’t had a stolen base in 6 months, and the manager decided it was because the other teams were reading his signals to the base runners. He came up with a new set of signals (pulling on his EAR, lifting one LEG, patting the top of his HEAD, and BOWing) to indicate when runners should attempt to steal a base. A runner should STEAL a base if and only if the manager pulls his EAR and BOWs while patting his HEAD, or if he lifts his LEG and pats his HEAD without BOWing, or anytime he pulls his EAR without lifting his LEG. Sketch a minimal circuit that could be used to indicate when a runner should steal a base. Problem 9. A room has four doors and four light switches (one by each door). Sketch a circuit that allows the four switches to control the light – each switch should be able to turn the light on if it is currently off, and off if it is currently on. Note that it will not be possible to associate a given switch position with “light on” or “light off” – simply moving any switch should modify the light’s status.

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Project management restructuring may be beneficial in that it permits companies to: a. Accomplish tasks that could not be handled effectively by the traditional structure b. Eliminate executive involvement in projects c. Accomplish one-time activities with minimal organizational disruption d. All of the above e. A and C only

## Project management restructuring may be beneficial in that it permits companies to: a. Accomplish tasks that could not be handled effectively by the traditional structure b. Eliminate executive involvement in projects c. Accomplish one-time activities with minimal organizational disruption d. All of the above e. A and C only

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EE118 FALL 2012 SAN JOSE STATE UNIVERSITY Department of Electrical Engineering TEST 2 — Digital Design I October 24, 2012 10:30 a.m. – 11:45 a.m. — Closed Book & Closed Notes — — No Crib Sheet Allowed — STUDENT NAME: (Last) Claussen , (First) Matthew STUDENT ID NUMBER (LAST 4 DIGITS): No interpretation of test problems will be given during the test. If you are not sure of what is intended, make appropriate assumptions and continue. Do not unstaple !!! Problems 1-14(4 points each) TOTAL Problems 15 – 17 (15 pts each) 1203 2 For the next 14 problems, circle the correct answer. No partial credit will be given. PROBLEM 1 (4 points) Which statement is not true? A. Any combinational circuit may be designed using multiplexers only. B. Any combinational circuit may be designed using decoders only. C. All Sequential circuits are based on cross-coupled NAND or NOR gates. D. A hazard in a digital system is an undesirable effect caused by either a deficiency in the system or external influences. E. None of the above PROBLEM 2 (4 points) For a 2-bit comparator comparing 2-bit numbers A = (a1 a0) and B = (b1 b0), what is the proper function for the f(A>B) output through logical reasoning? A. a1 b1’ + (a1 b1 + a1’b1’ ) a0 b0’ B. a1 b1’ + (a1 b1’+ a1’b1 ) a0 b0 C. a1 a0’ + (a1 a0 + b1’b0’ ) b1 b0’ D. a1 a0 + (a1 a0’+ b1’b0 ) b1 b0 PROBLEM 3 (4 points) What is the priority scheme of this encoder? Inputs Outputs I3 I2 I1 I0 O1 O 0 d d 1 d 0 1 d d 0 1 0 0 d 1 0 0 1 0 1 0 0 0 1 1 A. I3 > I2 > I1 >I0 B. I0 > I1 > I2 >I3 C. I1 > I0 > I2 >I3 D. I2 > I1 > I3 >I0 3 PROBLEM 4 (4 points) Which is the correct binary representation of the decimal number 46.625? A. 101101.001 B. 101000.01 C. 111001.001 D. 101110.101 PROBLEM 5 (4 points) Which is the decimal equivalent number of the sum of the two 8-bit 2’s complement numbers FB16 and 3748? A. 3 B. 5 C. 7 D. 9 PROBLEM 6 (4 points) For the MUX-based circuit shown below, f(X,Y,Z) = ? X Y Z f A. X’Y’ + Y’Z’ B. X’Y’Z’ + YZ’ C. XYZ’ + Y’Z D. X’Y’Z’ + YZ 1 0 MUX 4 PROBLEM 7 (4 points) Which is the correct output F of this circuit? E C B D F A A. (A’E+AB)(C’D) B. (AE+A’B)(C’+D) C. (A’E+AB)(C’D’+CD’+CD) D. (A’E+AB)(CD’)’ PROBLEM 8 (5 points) In order to correctly perform 2910  14510, how many bits are required to represent the numbers? A 8 B 9 C 10 D 11 PROBLEM 9 (4 points) Which is the negative 2’s complement equivalent of the 8-bit number 01001101? A. 11001101 B. 10111100 C. 10110000 D. 10110011 0 2-1 1 MUX 0 0 1 1 2-4 decoder 2 EN 3 5 PROBLEM 10 (4 points) Which is the correct statement describing the behavior of the following Verilog code? module whatisthis(hmm, X, Y); output [3:0] hmm; input [3:0] X, Y; assign hmm = (X < Y) ? X : Y; endmodule A. If X>Y, hmm becomes 1111. B. hmm assumes min(X,Y). C. If X<Y, hmm becomes 1111. D. hmm assumes max(X,Y). PROBLEM 11 (4 points) Which Boolean expression corresponds to the function g(W,X,Y,Z) implemented by the following “non-priority” encoder-based circuit? Assume that one and only one input is high at any time. f W X g Y Z A. Y + Z B. W + Y C. X + Y D. X + Z PROBLEM 12 (4 points) Which Boolean expression corresponds to the output of the following logic diagram? (/B = B’) A. Z = ( A(B’ + C)’ )’ + ( (B’ + C)’ + D )’ B. Z= A(B C’) + (B C’ + D) C. Z = (A(B’ + C)(B’ + C + D) )’ D. Z = A(B’ + C)’ + (B’ + C + D)’ 0 0 1 1 2 3 Encoder 6 PROBLEM 13 (4 points) Which is the correct gate-level circuit in minimal SOP form for the following circuit? A F = Y’X’ + W’ZY’X B F = YX’ + W’Z’Y’X C F = YX’ + W’ZY’X D F = Y’X + W’ZY’X’ PROBLEM 14 (4 points) For the following flow map of a certain cross-coupled gate circuit, the circuit is currently in the underlined state. If the inputs YZ change to 11, the circuit becomes meta-stable. Between which two states (WX) does the circuit oscillate ? A 00  11 B 01  10 C 11  10 D 10  00 YZ WX 00 01 11 10 00 00 11 00 10 01 10 10 10 01 11 00 00 11 01 10 10 01 01 10 G1 Y0 G2A Y1 G2B Y2 Y3 A Y4 B Y5 C Y6 Y7 G1 Y0 G2A Y1 G2B Y2 Y3 A Y4 B Y5 C Y6 Y7 OR W X Y Z X Y Z F + 5 V 7 For each of the next 3 problems, show all your work. Partial credits will be given. PROBLEM 15 (15 points) 1) Which logic variable causes the hazard for the circuit given by the K-map below? 2) Using the timing diagram, clearly show how the hazard occurs. 3) Find the best hazard-free logic function. YZ WX 00 01 11 10 00 0 0 1 1 01 0 0 0 0 11 1 0 0 0 10 1 0 1 1 8 PROBLEM 16(15 points) Analyze the following cross-coupled NAND gates by showing: (a) flow map with stable states circled and with meta-stability condition shown by arrows, (b) state table, and (c) completed timing diagram below. Note that d is the propagation delay of each gate. XY G1(t)G2(t) 00 01 11 10 00 01 11 10 Inputs  XY=00 XY=01 XY=11 XY=10 Present States  X Y G1(t) G2(t) 0 d 2d 3d 4d 5d 6d 7d 8d 9d X Y G1 G2 9 PROBLEM 17 (15 points) Using Quine-McCluskey algorithm, find the minimal SOP for the following minterm list. f(A, B, C) = (1,2,3,4,6,7) w(j) j Match I Match II 0 1 2 3 PI Covering Table

## EE118 FALL 2012 SAN JOSE STATE UNIVERSITY Department of Electrical Engineering TEST 2 — Digital Design I October 24, 2012 10:30 a.m. – 11:45 a.m. — Closed Book & Closed Notes — — No Crib Sheet Allowed — STUDENT NAME: (Last) Claussen , (First) Matthew STUDENT ID NUMBER (LAST 4 DIGITS): No interpretation of test problems will be given during the test. If you are not sure of what is intended, make appropriate assumptions and continue. Do not unstaple !!! Problems 1-14(4 points each) TOTAL Problems 15 – 17 (15 pts each) 1203 2 For the next 14 problems, circle the correct answer. No partial credit will be given. PROBLEM 1 (4 points) Which statement is not true? A. Any combinational circuit may be designed using multiplexers only. B. Any combinational circuit may be designed using decoders only. C. All Sequential circuits are based on cross-coupled NAND or NOR gates. D. A hazard in a digital system is an undesirable effect caused by either a deficiency in the system or external influences. E. None of the above PROBLEM 2 (4 points) For a 2-bit comparator comparing 2-bit numbers A = (a1 a0) and B = (b1 b0), what is the proper function for the f(A>B) output through logical reasoning? A. a1 b1’ + (a1 b1 + a1’b1’ ) a0 b0’ B. a1 b1’ + (a1 b1’+ a1’b1 ) a0 b0 C. a1 a0’ + (a1 a0 + b1’b0’ ) b1 b0’ D. a1 a0 + (a1 a0’+ b1’b0 ) b1 b0 PROBLEM 3 (4 points) What is the priority scheme of this encoder? Inputs Outputs I3 I2 I1 I0 O1 O 0 d d 1 d 0 1 d d 0 1 0 0 d 1 0 0 1 0 1 0 0 0 1 1 A. I3 > I2 > I1 >I0 B. I0 > I1 > I2 >I3 C. I1 > I0 > I2 >I3 D. I2 > I1 > I3 >I0 3 PROBLEM 4 (4 points) Which is the correct binary representation of the decimal number 46.625? A. 101101.001 B. 101000.01 C. 111001.001 D. 101110.101 PROBLEM 5 (4 points) Which is the decimal equivalent number of the sum of the two 8-bit 2’s complement numbers FB16 and 3748? A. 3 B. 5 C. 7 D. 9 PROBLEM 6 (4 points) For the MUX-based circuit shown below, f(X,Y,Z) = ? X Y Z f A. X’Y’ + Y’Z’ B. X’Y’Z’ + YZ’ C. XYZ’ + Y’Z D. X’Y’Z’ + YZ 1 0 MUX 4 PROBLEM 7 (4 points) Which is the correct output F of this circuit? E C B D F A A. (A’E+AB)(C’D) B. (AE+A’B)(C’+D) C. (A’E+AB)(C’D’+CD’+CD) D. (A’E+AB)(CD’)’ PROBLEM 8 (5 points) In order to correctly perform 2910  14510, how many bits are required to represent the numbers? A 8 B 9 C 10 D 11 PROBLEM 9 (4 points) Which is the negative 2’s complement equivalent of the 8-bit number 01001101? A. 11001101 B. 10111100 C. 10110000 D. 10110011 0 2-1 1 MUX 0 0 1 1 2-4 decoder 2 EN 3 5 PROBLEM 10 (4 points) Which is the correct statement describing the behavior of the following Verilog code? module whatisthis(hmm, X, Y); output [3:0] hmm; input [3:0] X, Y; assign hmm = (X < Y) ? X : Y; endmodule A. If X>Y, hmm becomes 1111. B. hmm assumes min(X,Y). C. If X

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What do Epicurus and Lucretius have to say about death? What do you think of their arguments?

## What do Epicurus and Lucretius have to say about death? What do you think of their arguments?

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